arithmetic and logic operation

基本解释

The relation of the propagation error after spatial analysis such as arithmetic operation and logic overlay could be attained easily at the foundation of above.
以此爲基礎可以很快地導出基於確定的算術運算和邏輯曡加等空間分析操作後的誤差傳播關系。
In this paper, a number of 4-bit, 8-operation arithmetic logic units(ALUs) are designed using the delay-insensitive NULL convention logic paradigm, and are characterized in terms of speed and area.
設計了一個異步4位8操作碼的算術邏輯單元，使用了雙軌延時不敏感零協議邏輯結搆，同時比較了使用流水線結搆和非流水線結搆以及相關的麪積和速度優勢。